Mar 09 10:15:22.831 VTTY: Console port: waiting connection on tcp port 2002 for protocol IPv4 (FD 12) Mar 09 10:15:22.875 slot0: C/H/S settings = 0/4/32 Mar 09 10:15:22.876 slot1: C/H/S settings = 0/4/32 Mar 09 10:15:23.239 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,idle_pc=0x6026e7b8,JIT on) Mar 09 10:15:23.239 CPU0: CPU_STATE: Starting CPU (old state=2)... Mar 09 10:15:23.304 ROM: Microcode has started. Mar 09 10:15:23.309 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:23.311 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xffffffff80a9d228 (size=1) Mar 09 10:15:23.311 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80a9d23c (size=1) Mar 09 10:15:23.455 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x6026eef8 (size=2) Mar 09 10:15:23.457 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60276800 (size=2) Mar 09 10:15:23.457 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc=0x60276810 (size=2) Mar 09 10:15:23.457 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007dac,a2=0x00000010,a3=0xbfb00000) Mar 09 10:15:24.626 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:24.702 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x60283d28 (size=2) Mar 09 10:15:24.703 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c50: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:24.703 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c54: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:24.703 CPU0: PCI: read request for device 'gt96100' at pc=0x60286a04: bus=0,device=0,function=0,reg=0x08 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:24.703 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:24.704 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:24.705 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=0x6028436c (size=2) Mar 09 10:15:24.707 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:24.708 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:24.709 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.709 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:24.709 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:24.709 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:24.709 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:24.709 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:24.709 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:24.710 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.710 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:24.710 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:24.710 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.710 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:24.711 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:24.711 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:24.711 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:24.711 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:24.711 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.712 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.712 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60276b14 (size=2) Mar 09 10:15:30.366 ROM: unhandled syscall 0x0000003e at pc=0x60a9e9bc (a1=0x80007d9c,a2=0x00002580,a3=0x64590000) Mar 09 10:15:30.367 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007da4,a2=0x00000000,a3=0x64590000) Mar 09 10:15:31.950 CPU0: JIT: partial JIT flush (count=177) Mar 09 10:15:32.076 CPU0: JIT: flushing data structures (compiled pages=234) Mar 09 10:15:32.166 ROM: trying to read bootvar 'BOOT' Mar 09 10:15:32.166 ROM: trying to read bootvar 'CONFIG_FILE' Mar 09 10:15:32.166 ROM: trying to read bootvar 'BOOTLDR' Mar 09 10:15:32.166 ROM: trying to read bootvar 'RSHELF' Mar 09 10:15:32.166 ROM: trying to read bootvar 'DSHELF' Mar 09 10:15:32.166 ROM: trying to read bootvar 'DSHELFINFO' Mar 09 10:15:32.166 ROM: trying to read bootvar 'RESET_COUNTER' Mar 09 10:15:32.166 ROM: trying to read bootvar 'CHRG_LOCRECSN' Mar 09 10:15:32.166 ROM: trying to read bootvar 'CHRG_ID' Mar 09 10:15:32.166 ROM: trying to read bootvar 'SLOTCACHE' Mar 09 10:15:32.166 ROM: trying to read bootvar 'OVERTEMP' Mar 09 10:15:32.166 ROM: trying to read bootvar 'DIAG' Mar 09 10:15:32.166 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:32.185 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:15:32.360 CPU0: JIT: flushing data structures (compiled pages=242) Mar 09 10:15:32.504 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60819334 (size=2) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60818f30 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f74 (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f80, value=0x00000020 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f84 (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f8c, value=0x00000000 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f98 (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818fa4, value=0x00000040 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fb8 (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fc4, value=0x00000000 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fd0 (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fe0, value=0x00000080 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adac (size=1) Mar 09 10:15:32.505 CPU0: MTS: write access to undefined address 0x3c000002 at pc=0x6081adb8, value=0x00000080 (size=1) Mar 09 10:15:32.505 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adbc (size=1) Mar 09 10:15:32.697 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:32.898 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.170 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.424 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.664 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.928 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c080007 at pc=0x608190cc, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c080008 at pc=0x608190d4, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c080009 at pc=0x608190dc, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c08000a at pc=0x608190e0, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c08000b at pc=0x608190e4, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: write access to undefined address 0x3c08000c at pc=0x608190e8, value=0x00000002 (size=1) Mar 09 10:15:33.929 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60819f6c (size=1) Mar 09 10:15:34.072 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:15:34.179 CPU0: JIT: flushing data structures (compiled pages=253) Mar 09 10:15:34.299 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:34.299 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x1000, pc=0x60283ddc (size=2) Mar 09 10:15:34.299 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:34.299 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x2000, pc=0x60283ddc (size=2) Mar 09 10:15:34.727 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.727 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.901 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.901 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:35.125 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:35.125 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:35.125 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:35.125 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:35.125 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:35.126 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:35.497 CPU0: JIT: partial JIT flush (count=174) Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.715 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.715 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.715 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.715 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.716 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.716 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.726 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.726 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.726 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.727 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.727 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.727 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.733 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.733 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.733 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.812 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x60277d00 (size=2) Mar 09 10:15:35.812 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x60277d08 (size=2) Mar 09 10:15:35.812 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x60277d28 (size=2) Mar 09 10:15:35.812 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x60277d38 (size=2) Mar 09 10:15:35.815 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.816 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.816 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.817 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.817 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.817 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.820 CPU0: JIT: flushing data structures (compiled pages=277) Mar 09 10:15:35.920 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:36.011 CPU0: JIT: flushing data structures (compiled pages=284) Mar 09 10:15:36.125 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.125 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.125 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.130 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.130 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.130 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.136 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:36.198 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.198 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.198 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.200 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.200 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.200 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.204 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.204 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.204 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.205 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.205 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.205 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.237 CPU0: JIT: flushing data structures (compiled pages=310) Mar 09 10:15:36.406 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:36.424 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.424 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.424 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.425 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.425 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.425 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.475 CPU0: JIT: flushing data structures (compiled pages=309) Mar 09 10:15:36.893 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:36.997 CPU0: JIT: flushing data structures (compiled pages=313) Mar 09 10:15:37.116 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:37.213 CPU0: JIT: flushing data structures (compiled pages=306) Mar 09 10:15:37.281 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:37.508 CPU0: JIT: flushing data structures (compiled pages=316) Mar 09 10:15:37.644 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:37.749 CPU0: JIT: flushing data structures (compiled pages=315) Mar 09 10:15:37.886 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:38.055 CPU0: JIT: flushing data structures (compiled pages=325) Mar 09 10:15:38.454 CPU0: JIT: partial JIT flush (count=131) Mar 09 10:15:38.496 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:39.244 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:39.362 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:39.412 ROM: trying to read bootvar 'PMDEBUG' Mar 09 10:15:39.425 ROM: trying to read bootvar 'MONDEBUG' Mar 09 10:15:39.567 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:40.095 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.439 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:40.619 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.620 ROM: unhandled syscall 0x0000001a at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.620 ROM: unhandled syscall 0x00000009 at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.767 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:15:40.880 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:40.989 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:15:41.058 CPU0: JIT: flushing data structures (compiled pages=551) Mar 09 10:15:41.145 CPU0: JIT: partial JIT flush (count=213) Mar 09 10:15:41.328 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:41.653 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:15:41.813 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:41.937 CPU0: JIT: partial JIT flush (count=202) Mar 09 10:15:42.062 CPU0: JIT: flushing data structures (compiled pages=550) Mar 09 10:15:42.158 CPU0: JIT: partial JIT flush (count=215) Mar 09 10:15:42.290 CPU0: JIT: flushing data structures (compiled pages=552) Mar 09 10:15:42.400 CPU0: JIT: partial JIT flush (count=204) Mar 09 10:15:42.482 CPU0: JIT: flushing data structures (compiled pages=553) Mar 09 10:15:42.576 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:42.681 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:42.790 CPU0: JIT: partial JIT flush (count=210) Mar 09 10:15:42.877 CPU0: JIT: flushing data structures (compiled pages=553) Mar 09 10:15:43.022 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:15:43.120 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:15:43.221 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:43.307 CPU0: JIT: flushing data structures (compiled pages=556) Mar 09 10:15:43.386 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:43.386 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:43.386 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:43.399 CPU0: JIT: partial JIT flush (count=215) Mar 09 10:15:43.478 CPU0: JIT: flushing data structures (compiled pages=556) Mar 09 10:15:43.566 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:43.574 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:15:43.678 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:15:43.719 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:43.719 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:43.719 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:43.740 CPU0: JIT: partial JIT flush (count=219) Mar 09 10:15:43.855 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:44.013 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:15:44.082 CPU0: JIT: flushing data structures (compiled pages=556) Mar 09 10:15:44.180 CPU0: JIT: partial JIT flush (count=209) Mar 09 10:15:44.280 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:44.390 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:44.490 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:15:44.619 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:15:44.879 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:15:44.942 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608192f4 (size=2) Mar 09 10:15:44.942 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x608192fc (size=2) Mar 09 10:15:44.953 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:44.984 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC' Mar 09 10:15:45.118 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:45.221 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:15:45.469 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:15:45.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:45.554 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:45.623 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:45.701 CPU0: JIT: partial JIT flush (count=219) Mar 09 10:15:45.801 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:45.907 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:15:46.019 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:15:46.196 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.198 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:15:46.317 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:15:46.462 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:46.553 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:15:46.614 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.625 CPU0: JIT: partial JIT flush (count=204) Mar 09 10:15:46.670 ROM: trying to set bootvar 'BSI=0' Mar 09 10:15:46.891 ROM: trying to read bootvar 'RET_2_RCALTS' Mar 09 10:15:46.891 ROM: trying to set bootvar 'RET_2_RCALTS=' Mar 09 10:15:46.960 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:15:47.071 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:47.123 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:47.196 CPU0: JIT: partial JIT flush (count=212) Mar 09 10:15:47.307 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:15:47.368 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.404 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:47.489 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:47.573 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.634 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.642 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:15:47.749 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:47.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.857 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:48.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.084 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:48.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.756 CPU0: JIT: partial JIT flush (count=168) Mar 09 10:15:48.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.306 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.180 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:15:51.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.206 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:15:53.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.308 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.658 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:15:56.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.501 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:57.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.210 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:15:58.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.561 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.198 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:15:59.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.808 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.308 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.808 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.218 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:03.308 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.654 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:16:06.808 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.499 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:16:07.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.636 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:16:10.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.678 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:16:16.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.378 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:17.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.755 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:19.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.660 CPU0: JIT: partial JIT flush (count=182) Mar 09 10:16:26.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.107 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:16:27.192 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:16:27.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.612 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:16:27.769 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:16:27.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.924 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:16:28.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.212 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:28.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.352 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:16:28.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.762 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:16:28.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.720 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:29.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.435 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:30.550 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.790 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:31.818 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.209 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:16:32.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.351 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:16:32.519 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:32.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.625 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:16:32.750 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:32.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.384 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:16:33.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.293 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:16:34.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.750 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:34.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.460 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:16:36.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.123 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:37.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.747 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:16:37.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.671 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:39.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.212 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:16:40.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.224 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:42.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.745 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:16:42.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.749 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:16:45.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.876 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:16:45.978 CPU0: JIT: flushing data structures (compiled pages=587) Mar 09 10:16:46.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.662 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:16:46.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.104 CPU0: JIT: flushing data structures (compiled pages=584) Mar 09 10:16:47.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.668 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:47.748 CPU0: JIT: flushing data structures (compiled pages=595) Mar 09 10:16:47.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.840 CPU0: JIT: partial JIT flush (count=210) Mar 09 10:16:48.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.509 CPU0: JIT: flushing data structures (compiled pages=599) Mar 09 10:16:48.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.117 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:49.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.324 CPU0: JIT: flushing data structures (compiled pages=598) Mar 09 10:16:50.466 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:16:50.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.719 CPU0: JIT: flushing data structures (compiled pages=615) Mar 09 10:16:50.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.806 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.222 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:16:53.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.663 CPU0: JIT: flushing data structures (compiled pages=611) Mar 09 10:16:56.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.434 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:16:57.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.332 CPU0: JIT: flushing data structures (compiled pages=614) Mar 09 10:16:59.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.425 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:17:03.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.807 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.662 CPU0: JIT: flushing data structures (compiled pages=611) Mar 09 10:17:06.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.512 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:17:07.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.356 CPU0: JIT: flushing data structures (compiled pages=614) Mar 09 10:17:09.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.430 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:17:13.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.808 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.003 CPU0: JIT: flushing data structures (compiled pages=612) Mar 09 10:17:16.013 ROM: trying to set bootvar 'RANDOM_NUM=946785684' Mar 09 10:17:16.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.146 CPU0: JIT: partial JIT flush (count=211) Mar 09 10:17:16.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.423 CPU0: JIT: flushing data structures (compiled pages=628) Mar 09 10:17:16.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.768 CPU0: JIT: partial JIT flush (count=204) Mar 09 10:17:16.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.054 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.471 CPU0: JIT: flushing data structures (compiled pages=625) Mar 09 10:17:18.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.747 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:17:18.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.306 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.687 CPU0: JIT: flushing data structures (compiled pages=630) Mar 09 10:17:20.749 CPU0: JIT: partial JIT flush (count=214) Mar 09 10:17:20.793 CPU0: JIT: flushing data structures (compiled pages=639) Mar 09 10:17:20.861 CPU0: JIT: partial JIT flush (count=215) Mar 09 10:17:20.910 CPU0: JIT: flushing data structures (compiled pages=650) Mar 09 10:17:20.929 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.992 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:17:21.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.754 CPU0: JIT: flushing data structures (compiled pages=661) Mar 09 10:17:21.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.806 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.667 CPU0: JIT: partial JIT flush (count=182) Mar 09 10:17:26.807 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.239 CPU0: JIT: flushing data structures (compiled pages=657) Mar 09 10:17:27.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.357 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:17:29.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.807 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.022 CPU0: JIT: flushing data structures (compiled pages=657) Mar 09 10:17:33.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.054 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.307 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.653 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:17:36.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.263 CPU0: JIT: flushing data structures (compiled pages=658) Mar 09 10:17:37.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.332 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:17:39.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.206 CPU0: JIT: flushing data structures (compiled pages=661) Mar 09 10:17:43.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.308 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.104 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:17:46.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.465 CPU0: JIT: flushing data structures (compiled pages=669) Mar 09 10:17:46.550 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.096 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:17:47.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.780 CPU0: JIT: flushing data structures (compiled pages=668) Mar 09 10:17:47.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.464 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:17:48.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.220 CPU0: JIT: flushing data structures (compiled pages=676) Mar 09 10:17:49.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.749 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:17:50.817 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.485 CPU0: JIT: flushing data structures (compiled pages=684) Mar 09 10:17:51.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.665 CPU0: JIT: partial JIT flush (count=182) Mar 09 10:17:56.806 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.099 CPU0: JIT: flushing data structures (compiled pages=680) Mar 09 10:17:57.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.711 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:17:59.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.306 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.221 CPU0: JIT: flushing data structures (compiled pages=682) Mar 09 10:18:03.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.677 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:18:06.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.219 CPU0: JIT: flushing data structures (compiled pages=679) Mar 09 10:18:07.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.356 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:18:09.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.308 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.895 C3745_STOP: stopping simulation. Mar 09 10:18:11.895 CPU0: CPU_STATE: Halting CPU (old state=0)... Mar 09 10:18:11.941 VM: shutdown procedure engaged. Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "slot1" Mar 09 10:18:11.941 DEVICE: Removal of device slot1, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "slot0" Mar 09 10:18:11.941 DEVICE: Removal of device slot0, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "ns16552" Mar 09 10:18:11.941 DEVICE: Removal of device ns16552, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "mem_bswap" Mar 09 10:18:11.941 DEVICE: Removal of device mem_bswap, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "rom" Mar 09 10:18:11.941 DEVICE: Removal of device rom, fd=15, host_addr=0xed800000, flags=1 Mar 09 10:18:11.941 MMAP: unmapping of device 'rom', fd=15, host_addr=0xed800000, len=0x200000 Mar 09 10:18:11.941 VM_OBJECT: Shutdown of object "ram" Mar 09 10:18:11.941 DEVICE: Removal of device ram, fd=14, host_addr=0xeda10000, flags=34 Mar 09 10:18:11.941 MMAP: unmapping of device 'ram', fd=14, host_addr=0xeda10000, len=0x10000000 Mar 09 10:18:11.956 VM_OBJECT: Shutdown of object "gt96100" Mar 09 10:18:11.956 DEVICE: Removal of device gt96100, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.956 VM_OBJECT: Shutdown of object "io_fpga" Mar 09 10:18:11.956 DEVICE: Removal of device io_fpga, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.956 VM_OBJECT: Shutdown of object "ssa" Mar 09 10:18:11.956 DEVICE: Removal of device ssa, fd=13, host_addr=0xfecb0000, flags=2 Mar 09 10:18:11.956 MMAP: unmapping of device 'ssa', fd=13, host_addr=0xfecb0000, len=0x7000 Mar 09 10:18:11.956 VM_OBJECT: Shutdown of object "remote_ctrl" Mar 09 10:18:11.956 DEVICE: Removal of device remote_ctrl, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.956 VM: removing PCI busses. Mar 09 10:18:11.956 VM: deleting VTTY. Mar 09 10:18:11.956 VTTY: Console port: closing FD 12 Mar 09 10:18:11.956 VM: deleting system CPUs. Mar 09 10:18:11.956 CPU0: CPU_STATE: Halting CPU (old state=1)... Mar 09 10:18:11.959 VM: shutdown procedure completed. Mar 09 10:18:12.088 VM: trying to shutdown an inactive VM.