Mar 09 10:15:22.833 VTTY: Console port: waiting connection on tcp port 2003 for protocol IPv4 (FD 12) Mar 09 10:15:22.893 slot0: C/H/S settings = 0/4/32 Mar 09 10:15:22.894 slot1: C/H/S settings = 0/4/32 Mar 09 10:15:23.339 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,idle_pc=0x6026e7b8,JIT on) Mar 09 10:15:23.339 CPU0: CPU_STATE: Starting CPU (old state=2)... Mar 09 10:15:23.526 ROM: Microcode has started. Mar 09 10:15:23.530 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:23.532 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xffffffff80a9d228 (size=1) Mar 09 10:15:23.532 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80a9d23c (size=1) Mar 09 10:15:23.756 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x6026eef8 (size=2) Mar 09 10:15:23.757 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60276800 (size=2) Mar 09 10:15:23.757 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc=0x60276810 (size=2) Mar 09 10:15:23.757 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007dac,a2=0x00000010,a3=0xbfb00000) Mar 09 10:15:25.042 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:25.112 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x60283d28 (size=2) Mar 09 10:15:25.113 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c50: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:25.113 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c54: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:25.113 CPU0: PCI: read request for device 'gt96100' at pc=0x60286a04: bus=0,device=0,function=0,reg=0x08 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:25.113 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:25.114 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:25.114 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=0x6028436c (size=2) Mar 09 10:15:25.114 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:25.115 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:25.115 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:25.115 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:25.115 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:25.115 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:25.115 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:25.116 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:25.116 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:25.116 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:25.116 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:25.116 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:25.116 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:25.116 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:25.117 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:25.117 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:25.117 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:25.117 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:25.117 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:25.118 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:25.118 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60276b14 (size=2) Mar 09 10:15:30.757 ROM: unhandled syscall 0x0000003e at pc=0x60a9e9bc (a1=0x80007d9c,a2=0x00002580,a3=0x64590000) Mar 09 10:15:30.757 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007da4,a2=0x00000000,a3=0x64590000) Mar 09 10:15:32.230 CPU0: JIT: partial JIT flush (count=177) Mar 09 10:15:32.336 CPU0: JIT: flushing data structures (compiled pages=234) Mar 09 10:15:32.420 ROM: trying to read bootvar 'BOOT' Mar 09 10:15:32.420 ROM: trying to read bootvar 'CONFIG_FILE' Mar 09 10:15:32.420 ROM: trying to read bootvar 'BOOTLDR' Mar 09 10:15:32.420 ROM: trying to read bootvar 'RSHELF' Mar 09 10:15:32.420 ROM: trying to read bootvar 'DSHELF' Mar 09 10:15:32.420 ROM: trying to read bootvar 'DSHELFINFO' Mar 09 10:15:32.420 ROM: trying to read bootvar 'RESET_COUNTER' Mar 09 10:15:32.420 ROM: trying to read bootvar 'CHRG_LOCRECSN' Mar 09 10:15:32.420 ROM: trying to read bootvar 'CHRG_ID' Mar 09 10:15:32.420 ROM: trying to read bootvar 'SLOTCACHE' Mar 09 10:15:32.420 ROM: trying to read bootvar 'OVERTEMP' Mar 09 10:15:32.420 ROM: trying to read bootvar 'DIAG' Mar 09 10:15:32.420 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:32.455 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:15:32.589 CPU0: JIT: flushing data structures (compiled pages=242) Mar 09 10:15:32.715 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60819334 (size=2) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60818f30 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f74 (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f80, value=0x00000020 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f84 (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f8c, value=0x00000000 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f98 (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818fa4, value=0x00000040 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fb8 (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fc4, value=0x00000000 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fd0 (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fe0, value=0x00000080 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adac (size=1) Mar 09 10:15:32.715 CPU0: MTS: write access to undefined address 0x3c000002 at pc=0x6081adb8, value=0x00000080 (size=1) Mar 09 10:15:32.715 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adbc (size=1) Mar 09 10:15:32.938 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.123 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.387 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.609 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.831 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:34.085 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c080007 at pc=0x608190cc, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c080008 at pc=0x608190d4, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c080009 at pc=0x608190dc, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c08000a at pc=0x608190e0, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c08000b at pc=0x608190e4, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: write access to undefined address 0x3c08000c at pc=0x608190e8, value=0x00000002 (size=1) Mar 09 10:15:34.086 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60819f6c (size=1) Mar 09 10:15:34.228 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:15:34.351 CPU0: JIT: flushing data structures (compiled pages=253) Mar 09 10:15:34.448 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:34.448 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x1000, pc=0x60283ddc (size=2) Mar 09 10:15:34.448 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:34.448 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x2000, pc=0x60283ddc (size=2) Mar 09 10:15:34.877 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.877 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.877 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.878 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.878 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.878 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.878 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.878 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.061 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.230 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:35.230 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:35.230 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.230 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:35.230 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:35.230 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:35.230 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:35.231 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:35.231 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:35.231 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.231 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:35.231 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:35.231 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:35.231 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:35.579 CPU0: JIT: partial JIT flush (count=174) Mar 09 10:15:35.799 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.800 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.800 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.800 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.800 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.801 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.820 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.820 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.820 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.821 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.821 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.821 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.827 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.827 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.827 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.889 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x60277d00 (size=2) Mar 09 10:15:35.889 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x60277d08 (size=2) Mar 09 10:15:35.889 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x60277d28 (size=2) Mar 09 10:15:35.889 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x60277d38 (size=2) Mar 09 10:15:35.893 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.893 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.893 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.894 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.894 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.894 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.897 CPU0: JIT: flushing data structures (compiled pages=277) Mar 09 10:15:36.013 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:36.107 CPU0: JIT: flushing data structures (compiled pages=284) Mar 09 10:15:36.214 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.214 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.214 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.215 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.215 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.215 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.220 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:36.280 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.281 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.281 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.282 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.282 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.282 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.286 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.286 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.286 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.287 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.287 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.287 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.323 CPU0: JIT: flushing data structures (compiled pages=310) Mar 09 10:15:36.484 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:36.523 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.523 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.523 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.524 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.524 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.524 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.576 CPU0: JIT: flushing data structures (compiled pages=309) Mar 09 10:15:37.009 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:37.086 CPU0: JIT: flushing data structures (compiled pages=313) Mar 09 10:15:37.195 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:37.296 CPU0: JIT: flushing data structures (compiled pages=306) Mar 09 10:15:37.400 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:37.630 CPU0: JIT: flushing data structures (compiled pages=316) Mar 09 10:15:37.731 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:37.836 CPU0: JIT: flushing data structures (compiled pages=315) Mar 09 10:15:37.986 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:38.103 CPU0: JIT: flushing data structures (compiled pages=325) Mar 09 10:15:38.514 CPU0: JIT: partial JIT flush (count=135) Mar 09 10:15:38.578 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:39.316 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:39.450 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:39.526 ROM: trying to read bootvar 'PMDEBUG' Mar 09 10:15:39.541 ROM: trying to read bootvar 'MONDEBUG' Mar 09 10:15:39.665 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:40.234 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.543 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:40.748 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.749 ROM: unhandled syscall 0x0000001a at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.751 ROM: unhandled syscall 0x00000009 at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.841 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:41.020 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:41.116 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:41.191 CPU0: JIT: flushing data structures (compiled pages=551) Mar 09 10:15:41.298 CPU0: JIT: partial JIT flush (count=213) Mar 09 10:15:41.480 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:41.772 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:15:41.899 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:42.051 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:42.159 CPU0: JIT: flushing data structures (compiled pages=550) Mar 09 10:15:42.293 CPU0: JIT: partial JIT flush (count=215) Mar 09 10:15:42.399 CPU0: JIT: flushing data structures (compiled pages=552) Mar 09 10:15:42.485 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:15:42.571 CPU0: JIT: flushing data structures (compiled pages=553) Mar 09 10:15:42.676 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:42.788 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:42.890 CPU0: JIT: partial JIT flush (count=212) Mar 09 10:15:43.012 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:43.115 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:43.191 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:43.243 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:43.270 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:15:43.350 CPU0: JIT: flushing data structures (compiled pages=559) Mar 09 10:15:43.431 CPU0: JIT: partial JIT flush (count=216) Mar 09 10:15:43.512 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:43.512 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:43.512 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:43.514 CPU0: JIT: flushing data structures (compiled pages=559) Mar 09 10:15:43.607 CPU0: JIT: partial JIT flush (count=220) Mar 09 10:15:43.706 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:43.810 CPU0: JIT: partial JIT flush (count=202) Mar 09 10:15:43.903 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:43.903 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:43.903 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:43.908 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:44.051 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:15:44.132 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:44.224 CPU0: JIT: partial JIT flush (count=217) Mar 09 10:15:44.290 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:44.421 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:15:44.529 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:44.652 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:15:44.761 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:15:45.056 CPU0: JIT: partial JIT flush (count=175) Mar 09 10:15:45.140 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:45.141 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608192f4 (size=2) Mar 09 10:15:45.141 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x608192fc (size=2) Mar 09 10:15:45.183 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC' Mar 09 10:15:45.313 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:15:45.404 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:15:45.493 CPU0: JIT: partial JIT flush (count=217) Mar 09 10:15:45.578 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:45.664 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:45.736 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:45.831 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:45.844 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:15:45.947 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:46.040 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:15:46.317 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:15:46.416 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.512 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:15:46.588 CPU0: JIT: flushing data structures (compiled pages=574) Mar 09 10:15:46.735 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:46.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.794 ROM: trying to set bootvar 'BSI=0' Mar 09 10:15:46.883 ROM: trying to read bootvar 'RET_2_RCALTS' Mar 09 10:15:46.883 ROM: trying to set bootvar 'RET_2_RCALTS=' Mar 09 10:15:46.890 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:15:46.984 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:15:47.082 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:15:47.094 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.141 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:47.222 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:15:47.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.417 CPU0: JIT: partial JIT flush (count=184) Mar 09 10:15:47.481 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.501 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:47.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.893 CPU0: JIT: partial JIT flush (count=162) Mar 09 10:15:47.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.583 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:15:48.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.906 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.095 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:50.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.420 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.901 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.902 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.162 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.591 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:15:52.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.150 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.669 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.910 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.922 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.174 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.422 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.919 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.680 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:15:56.914 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:15:56.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.168 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.414 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.605 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:15:58.663 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.178 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.441 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:15:59.668 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.926 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.677 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.926 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.425 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.674 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.406 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.152 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.438 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:16:03.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.916 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.415 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.664 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.670 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:16:06.910 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.156 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.187 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:16:07.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.663 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.174 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.418 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.669 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.918 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.414 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.911 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.162 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.156 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.654 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.904 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.155 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.663 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.694 CPU0: JIT: flushing data structures (compiled pages=569) Mar 09 10:16:16.923 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.087 CPU0: JIT: partial JIT flush (count=204) Mar 09 10:16:17.155 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.923 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.669 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.922 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.173 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.422 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.674 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.894 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:16:19.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.163 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.661 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.911 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.163 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.413 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.665 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.414 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.654 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.904 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.153 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.180 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.672 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.685 CPU0: JIT: partial JIT flush (count=180) Mar 09 10:16:26.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.067 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:27.152 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.194 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:16:27.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.508 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:27.653 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.746 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:27.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.950 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:28.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.359 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:16:28.406 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.882 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:28.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.664 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.721 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:29.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.160 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.683 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:16:31.777 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:16:31.898 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.226 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:32.312 CPU0: JIT: partial JIT flush (count=202) Mar 09 10:16:32.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.672 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:16:32.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.746 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:32.901 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.156 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.338 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:33.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.733 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:16:33.926 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.306 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:16:34.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.203 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:16:35.415 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.670 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.156 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.675 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:16:36.902 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.093 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:16:37.159 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.415 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.663 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.974 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:39.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.895 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:39.900 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.168 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.652 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.911 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.413 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.211 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:16:42.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.613 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:16:42.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.702 CPU0: JIT: flushing data structures (compiled pages=578) Mar 09 10:16:42.745 CPU0: JIT: partial JIT flush (count=212) Mar 09 10:16:42.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.922 CPU0: JIT: flushing data structures (compiled pages=593) Mar 09 10:16:43.155 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.888 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:16:43.900 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.156 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.413 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.670 CPU0: JIT: flushing data structures (compiled pages=592) Mar 09 10:16:44.710 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.759 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:16:44.909 CPU0: JIT: flushing data structures (compiled pages=603) Mar 09 10:16:44.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.153 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.409 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.664 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.749 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:45.928 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.426 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.693 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:16:46.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.907 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:47.178 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.404 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.909 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.420 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.574 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:16:48.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.906 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.155 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.542 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:16:49.672 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.911 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.372 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:16:50.400 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.431 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:16:50.511 CPU0: JIT: flushing data structures (compiled pages=619) Mar 09 10:16:50.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.900 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.398 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.428 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:51.673 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.426 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.167 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.399 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.639 CPU0: JIT: flushing data structures (compiled pages=620) Mar 09 10:16:53.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.902 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.653 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.171 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.401 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.917 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.181 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.684 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:16:56.695 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.919 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.089 CPU0: JIT: flushing data structures (compiled pages=617) Mar 09 10:16:57.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.414 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.672 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.650 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.909 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.169 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.426 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.427 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:16:59.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.150 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.920 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.401 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.657 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.924 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.180 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.401 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.634 CPU0: JIT: flushing data structures (compiled pages=616) Mar 09 10:17:03.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.153 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.413 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.686 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.922 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.179 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.172 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.679 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:17:06.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.065 CPU0: JIT: flushing data structures (compiled pages=617) Mar 09 10:17:07.159 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.671 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.904 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.413 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.922 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.406 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.673 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.179 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.010 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:17:11.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.680 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.911 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.425 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.895 CPU0: JIT: flushing data structures (compiled pages=622) Mar 09 10:17:12.906 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.340 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:17:13.409 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.653 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.667 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.901 CPU0: JIT: flushing data structures (compiled pages=626) Mar 09 10:17:14.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.398 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.430 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:17:15.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.042 ROM: trying to set bootvar 'RANDOM_NUM=200922897' Mar 09 10:17:16.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.247 CPU0: JIT: flushing data structures (compiled pages=638) Mar 09 10:17:16.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.679 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:17:16.694 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.074 CPU0: JIT: flushing data structures (compiled pages=640) Mar 09 10:17:17.171 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.404 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.668 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.157 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.683 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:17:18.924 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.419 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.677 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.160 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.420 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.693 CPU0: JIT: flushing data structures (compiled pages=640) Mar 09 10:17:20.746 CPU0: JIT: partial JIT flush (count=224) Mar 09 10:17:20.793 CPU0: JIT: flushing data structures (compiled pages=647) Mar 09 10:17:20.852 CPU0: JIT: partial JIT flush (count=216) Mar 09 10:17:20.928 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.930 CPU0: JIT: flushing data structures (compiled pages=657) Mar 09 10:17:21.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.425 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.745 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:17:21.918 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.916 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.174 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.909 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.904 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.158 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.167 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.424 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.691 CPU0: JIT: flushing data structures (compiled pages=661) Mar 09 10:17:26.919 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.085 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:17:27.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.403 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.926 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.181 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.400 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.168 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.680 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.905 CPU0: JIT: flushing data structures (compiled pages=659) Mar 09 10:17:29.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.171 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.651 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.167 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.677 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.898 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.926 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.440 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:17:33.656 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.152 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.404 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.659 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.173 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.653 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.680 CPU0: JIT: flushing data structures (compiled pages=660) Mar 09 10:17:36.910 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.074 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:17:37.165 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.678 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.423 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.900 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.406 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.165 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.667 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.799 CPU0: JIT: flushing data structures (compiled pages=659) Mar 09 10:17:40.914 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.172 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.920 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.179 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.401 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.654 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.915 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:17:42.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.152 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.429 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.430 CPU0: JIT: flushing data structures (compiled pages=668) Mar 09 10:17:43.650 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.173 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.426 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.652 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.908 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:17:44.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.161 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.401 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.740 CPU0: JIT: flushing data structures (compiled pages=676) Mar 09 10:17:45.909 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.172 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.681 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:17:46.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.072 CPU0: JIT: flushing data structures (compiled pages=674) Mar 09 10:17:47.166 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.411 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.569 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:17:48.654 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.918 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.159 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.444 CPU0: JIT: flushing data structures (compiled pages=675) Mar 09 10:17:49.677 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.918 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.177 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.400 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.654 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.771 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:17:50.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.995 CPU0: JIT: flushing data structures (compiled pages=681) Mar 09 10:17:51.178 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.405 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.662 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.993 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:17:52.159 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.419 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.650 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.678 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.905 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.160 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.674 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.410 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.924 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.667 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.684 CPU0: JIT: flushing data structures (compiled pages=681) Mar 09 10:17:56.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.073 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:17:57.168 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.421 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.162 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.419 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.899 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.154 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.408 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.894 CPU0: JIT: flushing data structures (compiled pages=680) Mar 09 10:17:59.906 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.168 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.652 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.920 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.928 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.404 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.658 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.167 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.634 CPU0: JIT: partial JIT flush (count=184) Mar 09 10:18:03.680 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.915 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.170 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.650 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.908 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.160 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.416 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.667 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.920 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.173 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.680 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.700 CPU0: JIT: flushing data structures (compiled pages=682) Mar 09 10:18:06.925 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.091 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:18:07.153 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.412 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.665 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.928 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.153 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.663 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.920 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.399 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.655 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.912 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.165 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.420 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.676 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.900 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.997 CPU0: JIT: flushing data structures (compiled pages=680) Mar 09 10:18:11.167 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.422 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.679 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.895 C3745_STOP: stopping simulation. Mar 09 10:18:11.895 CPU0: CPU_STATE: Halting CPU (old state=0)... Mar 09 10:18:12.001 VM: shutdown procedure engaged. Mar 09 10:18:12.001 VM_OBJECT: Shutdown of object "slot1" Mar 09 10:18:12.001 DEVICE: Removal of device slot1, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:12.001 VM_OBJECT: Shutdown of object "slot0" Mar 09 10:18:12.001 DEVICE: Removal of device slot0, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:12.001 VM_OBJECT: Shutdown of object "ns16552" Mar 09 10:18:12.001 DEVICE: Removal of device ns16552, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:12.002 VM_OBJECT: Shutdown of object "mem_bswap" Mar 09 10:18:12.002 DEVICE: Removal of device mem_bswap, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:12.002 VM_OBJECT: Shutdown of object "rom" Mar 09 10:18:12.002 DEVICE: Removal of device rom, fd=15, host_addr=0xed760000, flags=1 Mar 09 10:18:12.002 MMAP: unmapping of device 'rom', fd=15, host_addr=0xed760000, len=0x200000 Mar 09 10:18:12.002 VM_OBJECT: Shutdown of object "ram" Mar 09 10:18:12.002 DEVICE: Removal of device ram, fd=14, host_addr=0xed960000, flags=34 Mar 09 10:18:12.002 MMAP: unmapping of device 'ram', fd=14, host_addr=0xed960000, len=0x10000000 Mar 09 10:18:12.023 VM_OBJECT: Shutdown of object "gt96100" Mar 09 10:18:12.023 DEVICE: Removal of device gt96100, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:12.023 VM_OBJECT: Shutdown of object "io_fpga" Mar 09 10:18:12.023 DEVICE: Removal of device io_fpga, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:12.023 VM_OBJECT: Shutdown of object "ssa" Mar 09 10:18:12.023 DEVICE: Removal of device ssa, fd=13, host_addr=0xfd960000, flags=2 Mar 09 10:18:12.023 MMAP: unmapping of device 'ssa', fd=13, host_addr=0xfd960000, len=0x7000 Mar 09 10:18:12.023 VM_OBJECT: Shutdown of object "remote_ctrl" Mar 09 10:18:12.023 DEVICE: Removal of device remote_ctrl, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:12.023 VM: removing PCI busses. Mar 09 10:18:12.023 VM: deleting VTTY. Mar 09 10:18:12.023 VTTY: Console port: closing FD 12 Mar 09 10:18:12.023 VM: deleting system CPUs. Mar 09 10:18:12.023 CPU0: CPU_STATE: Halting CPU (old state=1)... Mar 09 10:18:12.028 VM: shutdown procedure completed. Mar 09 10:18:12.164 VM: trying to shutdown an inactive VM.