Mar 09 10:15:22.814 VTTY: Console port: waiting connection on tcp port 2004 for protocol IPv4 (FD 11) Mar 09 10:15:22.851 slot0: C/H/S settings = 0/4/32 Mar 09 10:15:22.851 slot1: C/H/S settings = 0/4/32 Mar 09 10:15:23.186 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,idle_pc=0x6026e7b8,JIT on) Mar 09 10:15:23.186 CPU0: CPU_STATE: Starting CPU (old state=2)... Mar 09 10:15:23.216 ROM: Microcode has started. Mar 09 10:15:23.222 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:23.224 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xffffffff80a9d228 (size=1) Mar 09 10:15:23.224 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80a9d23c (size=1) Mar 09 10:15:23.423 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x6026eef8 (size=2) Mar 09 10:15:23.424 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60276800 (size=2) Mar 09 10:15:23.424 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc=0x60276810 (size=2) Mar 09 10:15:23.424 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007dac,a2=0x00000010,a3=0xbfb00000) Mar 09 10:15:24.565 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:24.638 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x60283d28 (size=2) Mar 09 10:15:24.639 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c50: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:24.639 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c54: bus=0,device=0,function=0,reg=0x00 Mar 09 10:15:24.639 CPU0: PCI: read request for device 'gt96100' at pc=0x60286a04: bus=0,device=0,function=0,reg=0x08 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x04 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x84 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x0c Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x8c Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x10). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x90). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x14). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:24.639 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x94). Mar 09 10:15:24.640 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=0x6028436c (size=2) Mar 09 10:15:24.640 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:24.640 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:24.640 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.640 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.640 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.640 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.640 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:24.640 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:24.640 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:24.641 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:24.641 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:24.641 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:24.641 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:24.641 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:24.641 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:24.641 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:24.641 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:24.641 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x00 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x0c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:24.642 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x18 Mar 09 10:15:24.642 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x1c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x20 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x24 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x30 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x3c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x64 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x68 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x00 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x0c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:24.642 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x18 Mar 09 10:15:24.642 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x1c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x20 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x24 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x30 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x3c Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x40 Mar 09 10:15:24.642 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x64 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x68 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.643 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:15:24.643 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60276b14 (size=2) Mar 09 10:15:30.158 ROM: unhandled syscall 0x0000003e at pc=0x60a9e9bc (a1=0x80007d9c,a2=0x00002580,a3=0x64590000) Mar 09 10:15:30.158 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007da4,a2=0x00000000,a3=0x64590000) Mar 09 10:15:31.714 CPU0: JIT: partial JIT flush (count=177) Mar 09 10:15:31.815 CPU0: JIT: flushing data structures (compiled pages=234) Mar 09 10:15:31.943 ROM: trying to read bootvar 'BOOT' Mar 09 10:15:31.943 ROM: trying to read bootvar 'CONFIG_FILE' Mar 09 10:15:31.943 ROM: trying to read bootvar 'BOOTLDR' Mar 09 10:15:31.943 ROM: trying to read bootvar 'RSHELF' Mar 09 10:15:31.943 ROM: trying to read bootvar 'DSHELF' Mar 09 10:15:31.943 ROM: trying to read bootvar 'DSHELFINFO' Mar 09 10:15:31.943 ROM: trying to read bootvar 'RESET_COUNTER' Mar 09 10:15:31.943 ROM: trying to read bootvar 'CHRG_LOCRECSN' Mar 09 10:15:31.943 ROM: trying to read bootvar 'CHRG_ID' Mar 09 10:15:31.943 ROM: trying to read bootvar 'SLOTCACHE' Mar 09 10:15:31.943 ROM: trying to read bootvar 'OVERTEMP' Mar 09 10:15:31.943 ROM: trying to read bootvar 'DIAG' Mar 09 10:15:31.943 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:15:31.963 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:15:32.184 CPU0: JIT: flushing data structures (compiled pages=242) Mar 09 10:15:32.311 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60819334 (size=2) Mar 09 10:15:32.311 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60818f30 (size=1) Mar 09 10:15:32.311 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f74 (size=1) Mar 09 10:15:32.311 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f80, value=0x00000020 (size=1) Mar 09 10:15:32.311 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f84 (size=1) Mar 09 10:15:32.311 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f8c, value=0x00000000 (size=1) Mar 09 10:15:32.312 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f98 (size=1) Mar 09 10:15:32.312 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818fa4, value=0x00000040 (size=1) Mar 09 10:15:32.312 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fb8 (size=1) Mar 09 10:15:32.312 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fc4, value=0x00000000 (size=1) Mar 09 10:15:32.312 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fd0 (size=1) Mar 09 10:15:32.312 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fe0, value=0x00000080 (size=1) Mar 09 10:15:32.312 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adac (size=1) Mar 09 10:15:32.312 CPU0: MTS: write access to undefined address 0x3c000002 at pc=0x6081adb8, value=0x00000080 (size=1) Mar 09 10:15:32.312 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adbc (size=1) Mar 09 10:15:32.516 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:32.712 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:32.918 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.177 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.456 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.670 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c080007 at pc=0x608190cc, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c080008 at pc=0x608190d4, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c080009 at pc=0x608190dc, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c08000a at pc=0x608190e0, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c08000b at pc=0x608190e4, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: write access to undefined address 0x3c08000c at pc=0x608190e8, value=0x00000002 (size=1) Mar 09 10:15:33.671 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60819f6c (size=1) Mar 09 10:15:33.774 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:15:33.858 CPU0: JIT: flushing data structures (compiled pages=253) Mar 09 10:15:33.966 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:33.966 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x1000, pc=0x60283ddc (size=2) Mar 09 10:15:33.966 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:15:33.966 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x2000, pc=0x60283ddc (size=2) Mar 09 10:15:34.509 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.509 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.667 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.667 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.667 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.667 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.668 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.668 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.668 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.668 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:34.849 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:15:34.849 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:34.849 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:34.850 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:15:34.850 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:34.850 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:15:35.258 CPU0: JIT: partial JIT flush (count=174) Mar 09 10:15:35.475 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.475 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.475 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.475 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.475 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.475 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.475 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x14 Mar 09 10:15:35.475 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:15:35.475 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.475 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x04 Mar 09 10:15:35.475 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.476 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.476 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.476 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:15:35.476 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.476 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:15:35.485 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.485 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.485 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.486 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x14 Mar 09 10:15:35.486 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x04 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.486 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:15:35.492 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.492 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.492 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.539 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x60277d00 (size=2) Mar 09 10:15:35.539 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x60277d08 (size=2) Mar 09 10:15:35.540 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x60277d28 (size=2) Mar 09 10:15:35.540 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x60277d38 (size=2) Mar 09 10:15:35.569 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.569 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.569 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.571 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.571 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.571 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.574 CPU0: JIT: flushing data structures (compiled pages=277) Mar 09 10:15:35.676 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:35.764 CPU0: JIT: flushing data structures (compiled pages=284) Mar 09 10:15:35.869 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.869 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.869 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.870 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.870 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.870 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.875 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:35.916 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.916 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.916 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.917 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.917 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.917 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:35.952 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:35.953 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:35.953 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:35.954 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:35.954 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:35.954 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.016 CPU0: JIT: flushing data structures (compiled pages=310) Mar 09 10:15:36.164 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:15:36.182 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:36.182 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:36.182 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:36.184 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:36.184 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:36.184 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:36.222 CPU0: JIT: flushing data structures (compiled pages=309) Mar 09 10:15:36.673 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:36.755 CPU0: JIT: flushing data structures (compiled pages=313) Mar 09 10:15:36.858 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:36.928 CPU0: JIT: flushing data structures (compiled pages=306) Mar 09 10:15:37.055 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:37.272 CPU0: JIT: flushing data structures (compiled pages=316) Mar 09 10:15:37.390 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:37.499 CPU0: JIT: flushing data structures (compiled pages=315) Mar 09 10:15:37.632 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:37.764 CPU0: JIT: flushing data structures (compiled pages=325) Mar 09 10:15:38.206 CPU0: JIT: partial JIT flush (count=131) Mar 09 10:15:38.253 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:38.943 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:15:39.075 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:39.119 ROM: trying to read bootvar 'PMDEBUG' Mar 09 10:15:39.133 ROM: trying to read bootvar 'MONDEBUG' Mar 09 10:15:39.270 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:15:39.810 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.161 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:40.308 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:15:40.309 ROM: unhandled syscall 0x0000001a at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.309 ROM: unhandled syscall 0x00000009 at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:15:40.426 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:15:40.561 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:40.656 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:40.731 CPU0: JIT: flushing data structures (compiled pages=551) Mar 09 10:15:40.804 CPU0: JIT: partial JIT flush (count=213) Mar 09 10:15:40.922 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:41.252 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:15:41.399 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:15:41.545 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:41.660 CPU0: JIT: flushing data structures (compiled pages=550) Mar 09 10:15:41.716 CPU0: JIT: partial JIT flush (count=215) Mar 09 10:15:41.820 CPU0: JIT: flushing data structures (compiled pages=551) Mar 09 10:15:41.923 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:15:42.067 CPU0: JIT: flushing data structures (compiled pages=553) Mar 09 10:15:42.160 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:42.310 CPU0: JIT: flushing data structures (compiled pages=556) Mar 09 10:15:42.414 CPU0: JIT: partial JIT flush (count=210) Mar 09 10:15:42.502 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:15:42.596 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:15:42.683 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:42.791 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:15:42.855 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:42.990 CPU0: JIT: partial JIT flush (count=191) Mar 09 10:15:43.035 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:15:43.093 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:15:43.215 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:15:43.234 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:15:43.234 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:15:43.234 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:15:43.278 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:43.372 CPU0: JIT: partial JIT flush (count=203) Mar 09 10:15:43.445 CPU0: JIT: flushing data structures (compiled pages=559) Mar 09 10:15:43.542 CPU0: JIT: partial JIT flush (count=217) Mar 09 10:15:43.612 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:15:43.612 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:15:43.612 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:15:43.617 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:43.695 CPU0: JIT: partial JIT flush (count=214) Mar 09 10:15:43.805 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:43.938 CPU0: JIT: partial JIT flush (count=209) Mar 09 10:15:44.074 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:44.185 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:44.289 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:44.392 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:15:44.665 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:15:44.751 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608192f4 (size=2) Mar 09 10:15:44.751 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x608192fc (size=2) Mar 09 10:15:44.760 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:15:44.799 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC' Mar 09 10:15:44.964 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:45.237 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:45.327 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:15:45.378 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:45.420 CPU0: JIT: partial JIT flush (count=202) Mar 09 10:15:45.479 CPU0: JIT: flushing data structures (compiled pages=558) Mar 09 10:15:45.588 CPU0: JIT: partial JIT flush (count=218) Mar 09 10:15:45.658 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:45.765 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:15:45.896 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:46.072 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:15:46.076 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.152 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:15:46.312 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:15:46.381 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.406 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:46.406 ROM: trying to set bootvar 'BSI=0' Mar 09 10:15:46.444 ROM: trying to read bootvar 'RET_2_RCALTS' Mar 09 10:15:46.445 ROM: trying to set bootvar 'RET_2_RCALTS=' Mar 09 10:15:46.573 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:15:46.657 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:46.707 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.728 CPU0: JIT: partial JIT flush (count=219) Mar 09 10:15:46.794 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:15:46.904 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:46.947 CPU0: JIT: partial JIT flush (count=178) Mar 09 10:15:47.069 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.160 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:15:47.332 CPU0: JIT: partial JIT flush (count=184) Mar 09 10:15:47.388 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:47.583 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:47.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.285 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:15:48.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.522 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:48.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.460 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:15:49.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:49.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:50.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.519 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:51.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.183 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:15:52.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:52.771 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.222 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:15:53.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:53.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:54.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:55.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:56.666 CPU0: JIT: partial JIT flush (count=184) Mar 09 10:15:56.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.444 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:15:57.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:57.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.308 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:15:58.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:58.771 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.022 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:15:59.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.396 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:16:00.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:00.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:01.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.523 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:02.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.025 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:16:03.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:03.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:04.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.022 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.524 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:05.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.022 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:06.684 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:06.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.444 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:16:07.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:07.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:08.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:09.778 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:10.778 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:11.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.522 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:12.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.238 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:13.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:13.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.019 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:14.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:15.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.524 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:16.684 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:16:16.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.462 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:17.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:17.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.521 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:18.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:19.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:20.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.519 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:21.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:22.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.220 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:16:23.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:23.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.522 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:24.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:25.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:26.674 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:16:26.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.235 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:27.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:27.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:28.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:29.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:30.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.667 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:16:31.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:31.787 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:16:32.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.304 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:16:32.523 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:32.604 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:32.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.043 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:16:33.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.393 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:16:33.521 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:33.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.298 CPU0: JIT: flushing data structures (compiled pages=563) Mar 09 10:16:34.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:34.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.270 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:16:35.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:35.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.519 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:36.798 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:16:37.022 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.098 CPU0: JIT: partial JIT flush (count=180) Mar 09 10:16:37.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:37.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.481 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:16:38.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:38.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:39.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:40.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:41.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.021 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:42.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.030 CPU0: JIT: partial JIT flush (count=184) Mar 09 10:16:43.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:43.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.633 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:16:44.711 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:16:44.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:44.802 CPU0: JIT: flushing data structures (compiled pages=584) Mar 09 10:16:45.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.271 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.297 CPU0: JIT: partial JIT flush (count=202) Mar 09 10:16:45.423 CPU0: JIT: flushing data structures (compiled pages=596) Mar 09 10:16:45.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:45.707 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:16:45.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.021 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.291 CPU0: JIT: flushing data structures (compiled pages=597) Mar 09 10:16:46.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:46.773 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.102 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:16:47.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:47.630 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:16:47.780 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:16:47.809 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.026 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.104 CPU0: JIT: flushing data structures (compiled pages=612) Mar 09 10:16:48.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:48.981 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:16:49.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:49.884 CPU0: JIT: flushing data structures (compiled pages=609) Mar 09 10:16:50.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:50.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:51.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:52.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.257 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:16:53.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:53.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.022 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:54.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:55.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:56.671 CPU0: JIT: flushing data structures (compiled pages=611) Mar 09 10:16:56.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.455 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:16:57.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:57.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.273 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:58.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:16:59.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:00.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:01.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:02.778 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.037 CPU0: JIT: flushing data structures (compiled pages=611) Mar 09 10:17:03.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:03.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:04.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.521 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:05.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.284 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:17:06.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:06.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.083 CPU0: JIT: flushing data structures (compiled pages=609) Mar 09 10:17:07.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:07.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:08.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.067 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:17:09.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:09.773 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.521 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:10.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:11.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.026 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:12.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.228 CPU0: JIT: flushing data structures (compiled pages=610) Mar 09 10:17:13.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:13.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:14.918 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:17:15.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.396 CPU0: JIT: flushing data structures (compiled pages=621) Mar 09 10:17:15.548 CPU0: JIT: partial JIT flush (count=212) Mar 09 10:17:15.566 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:15.638 ROM: trying to set bootvar 'RANDOM_NUM=270929155' Mar 09 10:17:15.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.213 CPU0: JIT: flushing data structures (compiled pages=626) Mar 09 10:17:16.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.400 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:17:16.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:16.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.086 CPU0: JIT: flushing data structures (compiled pages=629) Mar 09 10:17:17.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:17.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.440 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:17:18.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:18.840 CPU0: JIT: flushing data structures (compiled pages=638) Mar 09 10:17:19.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:19.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.624 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:17:20.661 CPU0: JIT: flushing data structures (compiled pages=637) Mar 09 10:17:20.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:20.806 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:17:20.862 CPU0: JIT: flushing data structures (compiled pages=646) Mar 09 10:17:20.928 CPU0: JIT: partial JIT flush (count=209) Mar 09 10:17:21.019 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.163 CPU0: JIT: flushing data structures (compiled pages=654) Mar 09 10:17:21.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:21.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:22.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:23.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.023 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:24.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:25.771 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.158 CPU0: JIT: partial JIT flush (count=182) Mar 09 10:17:26.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:26.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.091 CPU0: JIT: flushing data structures (compiled pages=652) Mar 09 10:17:27.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:27.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.509 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:17:28.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:28.771 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:29.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:30.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:31.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.304 CPU0: JIT: flushing data structures (compiled pages=654) Mar 09 10:17:32.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:32.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.308 CPU0: JIT: partial JIT flush (count=189) Mar 09 10:17:33.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:33.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:34.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.523 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:35.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.522 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:36.688 CPU0: JIT: flushing data structures (compiled pages=656) Mar 09 10:17:36.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.023 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.452 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:17:37.523 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:37.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:38.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:39.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.026 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:40.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.526 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:41.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:42.543 CPU0: JIT: flushing data structures (compiled pages=655) Mar 09 10:17:42.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:43.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.023 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:44.926 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:17:45.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.297 CPU0: JIT: flushing data structures (compiled pages=663) Mar 09 10:17:45.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:45.545 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:17:45.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.284 CPU0: JIT: flushing data structures (compiled pages=670) Mar 09 10:17:46.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:46.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.093 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:17:47.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.772 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:47.805 CPU0: JIT: flushing data structures (compiled pages=671) Mar 09 10:17:48.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.285 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:17:48.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:48.997 CPU0: JIT: flushing data structures (compiled pages=679) Mar 09 10:17:49.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:49.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:50.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.524 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:51.778 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:52.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.025 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.236 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:17:53.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:53.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:54.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:55.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.021 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:56.671 CPU0: JIT: flushing data structures (compiled pages=676) Mar 09 10:17:56.774 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.437 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:17:57.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:57.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:58.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:17:59.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.523 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:00.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:01.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:02.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.018 CPU0: JIT: flushing data structures (compiled pages=677) Mar 09 10:18:03.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.271 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:03.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.519 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:04.771 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.021 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:05.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.320 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:18:06.520 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:06.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.026 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.105 CPU0: JIT: flushing data structures (compiled pages=675) Mar 09 10:18:07.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:07.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:08.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.023 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:09.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.274 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:10.592 CPU0: JIT: partial JIT flush (count=186) Mar 09 10:18:10.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.020 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:18:11.894 C3745_STOP: stopping simulation. Mar 09 10:18:11.894 CPU0: CPU_STATE: Halting CPU (old state=0)... Mar 09 10:18:11.915 VM: shutdown procedure engaged. Mar 09 10:18:11.915 VM_OBJECT: Shutdown of object "slot1" Mar 09 10:18:11.915 DEVICE: Removal of device slot1, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:11.915 VM_OBJECT: Shutdown of object "slot0" Mar 09 10:18:11.915 DEVICE: Removal of device slot0, fd=-1, host_addr=0x0, flags=2 Mar 09 10:18:11.915 VM_OBJECT: Shutdown of object "ns16552" Mar 09 10:18:11.915 DEVICE: Removal of device ns16552, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.915 VM_OBJECT: Shutdown of object "mem_bswap" Mar 09 10:18:11.915 DEVICE: Removal of device mem_bswap, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.915 VM_OBJECT: Shutdown of object "rom" Mar 09 10:18:11.915 DEVICE: Removal of device rom, fd=14, host_addr=0xed6c0000, flags=1 Mar 09 10:18:11.915 MMAP: unmapping of device 'rom', fd=14, host_addr=0xed6c0000, len=0x200000 Mar 09 10:18:11.916 VM_OBJECT: Shutdown of object "ram" Mar 09 10:18:11.916 DEVICE: Removal of device ram, fd=13, host_addr=0xed8d0000, flags=34 Mar 09 10:18:11.916 MMAP: unmapping of device 'ram', fd=13, host_addr=0xed8d0000, len=0x10000000 Mar 09 10:18:11.931 VM_OBJECT: Shutdown of object "gt96100" Mar 09 10:18:11.931 DEVICE: Removal of device gt96100, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.931 VM_OBJECT: Shutdown of object "io_fpga" Mar 09 10:18:11.931 DEVICE: Removal of device io_fpga, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.931 VM_OBJECT: Shutdown of object "ssa" Mar 09 10:18:11.931 DEVICE: Removal of device ssa, fd=12, host_addr=0xfeb70000, flags=2 Mar 09 10:18:11.931 MMAP: unmapping of device 'ssa', fd=12, host_addr=0xfeb70000, len=0x7000 Mar 09 10:18:11.931 VM_OBJECT: Shutdown of object "remote_ctrl" Mar 09 10:18:11.931 DEVICE: Removal of device remote_ctrl, fd=-1, host_addr=0x0, flags=0 Mar 09 10:18:11.931 VM: removing PCI busses. Mar 09 10:18:11.931 VM: deleting VTTY. Mar 09 10:18:11.931 VTTY: Console port: closing FD 11 Mar 09 10:18:11.931 VM: deleting system CPUs. Mar 09 10:18:11.931 CPU0: CPU_STATE: Halting CPU (old state=1)... Mar 09 10:18:11.936 VM: shutdown procedure completed. Mar 09 10:18:12.127 VM: trying to shutdown an inactive VM.