Mar 09 10:10:50.988 VTTY: Console port: waiting connection on tcp port 2008 for protocol IPv4 (FD 12) Mar 09 10:10:51.126 slot0: C/H/S settings = 0/4/32 Mar 09 10:10:51.131 slot1: C/H/S settings = 0/4/32 Mar 09 10:10:51.597 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,idle_pc=0x6026e7b8,JIT on) Mar 09 10:10:51.597 CPU0: CPU_STATE: Starting CPU (old state=2)... Mar 09 10:10:51.602 ROM: Microcode has started. Mar 09 10:10:51.607 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:10:51.608 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xffffffff80a9d228 (size=1) Mar 09 10:10:51.608 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80a9d23c (size=1) Mar 09 10:10:51.799 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x6026eef8 (size=2) Mar 09 10:10:51.828 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60276800 (size=2) Mar 09 10:10:51.828 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc=0x60276810 (size=2) Mar 09 10:10:51.828 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007dac,a2=0x00000010,a3=0xbfb00000) Mar 09 10:10:53.313 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:10:53.387 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x60283d28 (size=2) Mar 09 10:10:53.388 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c50: bus=0,device=0,function=0,reg=0x00 Mar 09 10:10:53.388 CPU0: PCI: read request for device 'gt96100' at pc=0x60286c54: bus=0,device=0,function=0,reg=0x00 Mar 09 10:10:53.388 CPU0: PCI: read request for device 'gt96100' at pc=0x60286a04: bus=0,device=0,function=0,reg=0x08 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x04 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x04 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x84 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x84 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x0c Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x0c Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x8c Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x8c Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x10 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x10 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x90 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x90 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x14 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x14 Mar 09 10:10:53.388 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x94 Mar 09 10:10:53.389 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x94 Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x10). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x10). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x90). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x90). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x14). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x14). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b4c (bus=0,device=0,function=1,reg=0x94). Mar 09 10:10:53.389 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x60286b50 (bus=0,device=0,function=1,reg=0x94). Mar 09 10:10:53.389 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=0x6028436c (size=2) Mar 09 10:10:53.389 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:10:53.389 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:10:53.389 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:10:53.390 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:10:53.390 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:10:53.390 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:10:53.390 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:10:53.390 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x00 Mar 09 10:10:53.390 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x00 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=3,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=3,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x0c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x0c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x18 Mar 09 10:10:53.391 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x18 Mar 09 10:10:53.391 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x1c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x1c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x20 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x20 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x24 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x24 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x30 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x30 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x3c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x3c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x64 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x64 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x68 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x68 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=3,function=0,reg=0xf0 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x00 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x00 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=4,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=4,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x0c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x0c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x18 Mar 09 10:10:53.391 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x18 Mar 09 10:10:53.391 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x1c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x1c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x20 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x20 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x24 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x24 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x30 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x30 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x3c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x3c Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x40 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x64 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x64 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x68 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x68 Mar 09 10:10:53.391 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0x04 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0x04 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=4,function=0,reg=0xf0 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0x20 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0x20 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b4c: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:10:53.392 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x60286b50: bus=0,device=0,function=0,reg=0xa0 Mar 09 10:10:53.392 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60276b14 (size=2) Mar 09 10:10:59.040 ROM: unhandled syscall 0x0000003e at pc=0x60a9e9bc (a1=0x80007d9c,a2=0x00002580,a3=0x64590000) Mar 09 10:10:59.040 ROM: unhandled syscall 0x00000047 at pc=0x60a9e9bc (a1=0x80007da4,a2=0x00000000,a3=0x64590000) Mar 09 10:11:00.706 CPU0: JIT: partial JIT flush (count=177) Mar 09 10:11:00.826 CPU0: JIT: flushing data structures (compiled pages=234) Mar 09 10:11:00.909 ROM: trying to read bootvar 'BOOT' Mar 09 10:11:00.909 ROM: trying to read bootvar 'CONFIG_FILE' Mar 09 10:11:00.909 ROM: trying to read bootvar 'BOOTLDR' Mar 09 10:11:00.909 ROM: trying to read bootvar 'RSHELF' Mar 09 10:11:00.909 ROM: trying to read bootvar 'DSHELF' Mar 09 10:11:00.909 ROM: trying to read bootvar 'DSHELFINFO' Mar 09 10:11:00.910 ROM: trying to read bootvar 'RESET_COUNTER' Mar 09 10:11:00.910 ROM: trying to read bootvar 'CHRG_LOCRECSN' Mar 09 10:11:00.910 ROM: trying to read bootvar 'CHRG_ID' Mar 09 10:11:00.910 ROM: trying to read bootvar 'SLOTCACHE' Mar 09 10:11:00.910 ROM: trying to read bootvar 'OVERTEMP' Mar 09 10:11:00.910 ROM: trying to read bootvar 'DIAG' Mar 09 10:11:00.910 ROM: trying to read bootvar 'WARM_REBOOT' Mar 09 10:11:00.948 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:11:01.269 CPU0: JIT: flushing data structures (compiled pages=242) Mar 09 10:11:01.390 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x60819334 (size=2) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60818f30 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f74 (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f80, value=0x00000020 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f84 (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818f8c, value=0x00000000 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x60818f98 (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x60818fa4, value=0x00000040 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fb8 (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fc4, value=0x00000000 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x60818fd0 (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x60818fe0, value=0x00000080 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adac (size=1) Mar 09 10:11:01.391 CPU0: MTS: write access to undefined address 0x3c000002 at pc=0x6081adb8, value=0x00000080 (size=1) Mar 09 10:11:01.391 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081adbc (size=1) Mar 09 10:11:01.629 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:01.854 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:02.137 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:02.353 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:02.587 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:02.844 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x6081ade4 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c080007 at pc=0x608190cc, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c080008 at pc=0x608190d4, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c080009 at pc=0x608190dc, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c08000a at pc=0x608190e0, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c08000b at pc=0x608190e4, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: write access to undefined address 0x3c08000c at pc=0x608190e8, value=0x00000002 (size=1) Mar 09 10:11:02.845 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x60819f6c (size=1) Mar 09 10:11:02.953 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:11:03.058 CPU0: JIT: flushing data structures (compiled pages=253) Mar 09 10:11:03.184 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:11:03.184 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x1000, pc=0x60283ddc (size=2) Mar 09 10:11:03.184 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60283dd4 (size=2) Mar 09 10:11:03.184 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x2000, pc=0x60283ddc (size=2) Mar 09 10:11:03.702 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.702 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:03.883 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x00 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x00 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=1,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=1,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x0c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x0c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x18 Mar 09 10:11:04.125 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x18 Mar 09 10:11:04.125 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x1c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x1c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x20 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x20 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x24 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x24 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x30 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x30 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x3c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x64 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x64 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x68 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x68 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=1,function=0,reg=0xf0 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x00 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x00 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c60: bus=0,device=2,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: read request for device 'ti2050b' at pc=0x60286c64: bus=0,device=2,function=0,reg=0x40 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x0c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x0c Mar 09 10:11:04.125 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x18 Mar 09 10:11:04.125 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x18 Mar 09 10:11:04.126 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x1c Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x1c Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x20 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x20 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x24 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x24 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x30 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x30 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x3c Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x40 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x40 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x64 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x64 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x68 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x68 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0x04 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0x04 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b2c: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:11:04.126 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x60286b38: bus=0,device=2,function=0,reg=0xf0 Mar 09 10:11:04.521 CPU0: JIT: partial JIT flush (count=174) Mar 09 10:11:04.798 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.798 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.799 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.799 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x14 Mar 09 10:11:04.799 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x4d000000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x14 Mar 09 10:11:04.799 NM-1FE-TX(1): registers are mapped at 0x4d000000 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x04 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x04 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:11:04.799 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c60: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.799 CPU0: PCI: read request for device 'NM-1FE-TX(1)' at pc=0x60286c64: bus=1,device=0,function=0,reg=0x00 Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b2c: bus=1,device=0,function=0,reg=0x0c Mar 09 10:11:04.799 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(1)' at pc=0x60286b38: bus=1,device=0,function=0,reg=0x0c Mar 09 10:11:04.810 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:04.811 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:04.811 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x14 Mar 09 10:11:04.811 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x4d800000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x14 Mar 09 10:11:04.811 NM-1FE-TX(2): registers are mapped at 0x4d800000 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x04 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x00000006) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x04 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c60: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: read request for device 'NM-1FE-TX(2)' at pc=0x60286c64: bus=5,device=0,function=0,reg=0x00 Mar 09 10:11:04.811 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b2c: bus=5,device=0,function=0,reg=0x0c Mar 09 10:11:04.812 CPU0: PCI: write request (data=0x00004000) for device 'NM-1FE-TX(2)' at pc=0x60286b38: bus=5,device=0,function=0,reg=0x0c Mar 09 10:11:04.817 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:04.817 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:04.817 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:04.887 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x60277d00 (size=2) Mar 09 10:11:04.887 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x60277d08 (size=2) Mar 09 10:11:04.887 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x60277d28 (size=2) Mar 09 10:11:04.887 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x60277d38 (size=2) Mar 09 10:11:04.916 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:04.916 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:04.916 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:04.918 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:04.918 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:04.918 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:04.921 CPU0: JIT: flushing data structures (compiled pages=277) Mar 09 10:11:05.068 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:11:05.148 CPU0: JIT: flushing data structures (compiled pages=284) Mar 09 10:11:05.266 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:05.266 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:05.266 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:05.267 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:05.267 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:05.267 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:05.305 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:11:05.391 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:05.391 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:05.391 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:05.392 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:05.392 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:05.392 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:05.396 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:05.396 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:05.396 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:05.397 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:05.397 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:05.397 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:05.452 CPU0: JIT: flushing data structures (compiled pages=310) Mar 09 10:11:05.640 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:11:05.658 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:05.658 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:05.658 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:05.659 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:05.659 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:05.659 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:05.728 CPU0: JIT: flushing data structures (compiled pages=309) Mar 09 10:11:06.211 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:11:06.304 CPU0: JIT: flushing data structures (compiled pages=313) Mar 09 10:11:06.425 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:11:06.545 CPU0: JIT: flushing data structures (compiled pages=306) Mar 09 10:11:06.672 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:11:06.896 CPU0: JIT: flushing data structures (compiled pages=316) Mar 09 10:11:07.049 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:11:07.151 CPU0: JIT: flushing data structures (compiled pages=315) Mar 09 10:11:07.274 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:11:07.435 CPU0: JIT: flushing data structures (compiled pages=325) Mar 09 10:11:07.952 CPU0: JIT: partial JIT flush (count=131) Mar 09 10:11:08.031 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:08.913 CPU0: JIT: partial JIT flush (count=171) Mar 09 10:11:09.075 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:11:09.135 ROM: trying to read bootvar 'PMDEBUG' Mar 09 10:11:09.179 ROM: trying to read bootvar 'MONDEBUG' Mar 09 10:11:09.304 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:11:09.868 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:10.258 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:11:10.452 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:10.453 ROM: unhandled syscall 0x0000001a at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:11:10.453 ROM: unhandled syscall 0x00000009 at pc=0x60a9e9bc (a1=0x65024a6c,a2=0x00000001,a3=0x00000023) Mar 09 10:11:10.612 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:11:10.712 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:11:10.827 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:11:10.903 CPU0: JIT: flushing data structures (compiled pages=551) Mar 09 10:11:11.014 CPU0: JIT: partial JIT flush (count=213) Mar 09 10:11:11.207 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:11:11.502 CPU0: JIT: partial JIT flush (count=183) Mar 09 10:11:11.672 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:11:11.781 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:11:12.013 CPU0: JIT: flushing data structures (compiled pages=552) Mar 09 10:11:12.145 CPU0: JIT: partial JIT flush (count=211) Mar 09 10:11:12.216 CPU0: JIT: flushing data structures (compiled pages=552) Mar 09 10:11:12.331 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:11:12.441 CPU0: JIT: flushing data structures (compiled pages=554) Mar 09 10:11:12.538 CPU0: JIT: partial JIT flush (count=204) Mar 09 10:11:12.620 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:12.715 CPU0: JIT: partial JIT flush (count=212) Mar 09 10:11:12.791 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:12.839 NM-1FE-TX(1): fetching init block at address 0x0f7ca0e0 Mar 09 10:11:12.839 NM-1FE-TX(1): rx_ring = 0x0f7ca140 (64), tx_ring = 0x0f7ca580 (128) Mar 09 10:11:12.839 NM-1FE-TX(1): CSR0 = 0x0101 Mar 09 10:11:12.928 CPU0: JIT: partial JIT flush (count=217) Mar 09 10:11:13.065 CPU0: JIT: flushing data structures (compiled pages=557) Mar 09 10:11:13.185 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:11:13.213 NM-1FE-TX(2): fetching init block at address 0x0f818e00 Mar 09 10:11:13.213 NM-1FE-TX(2): rx_ring = 0x0f818e60 (64), tx_ring = 0x0f8192a0 (128) Mar 09 10:11:13.213 NM-1FE-TX(2): CSR0 = 0x0101 Mar 09 10:11:13.248 CPU0: JIT: flushing data structures (compiled pages=555) Mar 09 10:11:13.363 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:11:13.444 CPU0: JIT: flushing data structures (compiled pages=553) Mar 09 10:11:13.575 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:11:13.663 ROM: trying to read bootvar 'RANDOM_NUM' Mar 09 10:11:13.714 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:11:13.853 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:11:13.982 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:11:14.126 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:11:14.479 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:11:14.550 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608192f4 (size=2) Mar 09 10:11:14.550 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x608192fc (size=2) Mar 09 10:11:14.592 CPU0: JIT: partial JIT flush (count=195) Mar 09 10:11:14.638 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC' Mar 09 10:11:14.787 CPU0: JIT: flushing data structures (compiled pages=559) Mar 09 10:11:14.875 CPU0: JIT: partial JIT flush (count=218) Mar 09 10:11:14.958 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:11:15.073 CPU0: JIT: partial JIT flush (count=218) Mar 09 10:11:15.196 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:11:15.263 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:15.326 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:11:15.494 CPU0: JIT: flushing data structures (compiled pages=559) Mar 09 10:11:15.495 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:15.682 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:11:15.815 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:11:15.917 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:15.924 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:11:16.180 CPU0: JIT: flushing data structures (compiled pages=561) Mar 09 10:11:16.329 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:16.448 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:11:16.625 CPU0: JIT: flushing data structures (compiled pages=570) Mar 09 10:11:16.732 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:11:16.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:16.802 ROM: trying to set bootvar 'BSI=0' Mar 09 10:11:16.804 ROM: trying to read bootvar 'RET_2_RCALTS' Mar 09 10:11:16.804 ROM: trying to set bootvar 'RET_2_RCALTS=' Mar 09 10:11:16.877 CPU0: JIT: flushing data structures (compiled pages=568) Mar 09 10:11:16.956 CPU0: JIT: partial JIT flush (count=207) Mar 09 10:11:17.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:17.112 CPU0: JIT: flushing data structures (compiled pages=562) Mar 09 10:11:17.274 CPU0: JIT: partial JIT flush (count=210) Mar 09 10:11:17.404 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:11:17.497 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:11:17.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:17.609 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:17.748 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:17.755 CPU0: JIT: flushing data structures (compiled pages=560) Mar 09 10:11:17.917 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:17.920 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:11:18.061 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:18.318 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:18.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:18.694 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:11:18.825 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:19.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:19.309 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:19.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:19.574 CPU0: JIT: partial JIT flush (count=170) Mar 09 10:11:19.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:20.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:20.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:20.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:20.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:21.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:21.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:21.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:21.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:22.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:22.124 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:11:22.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:22.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:22.685 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:11:22.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:23.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:23.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:23.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:23.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:24.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:24.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:24.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:24.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:25.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:25.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:25.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:25.779 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:26.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:26.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:26.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:26.617 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:11:26.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:27.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:27.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:27.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:27.574 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:11:27.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:28.072 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:28.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:28.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:28.683 CPU0: JIT: flushing data structures (compiled pages=564) Mar 09 10:11:28.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:29.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:29.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:29.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:29.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:30.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:30.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:30.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:30.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:31.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:31.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:31.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:31.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:32.054 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:32.121 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:11:32.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:32.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:32.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:33.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:33.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:33.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:33.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:34.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:34.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:34.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:34.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:35.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:35.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:35.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:35.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:36.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:36.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:36.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:36.628 CPU0: JIT: flushing data structures (compiled pages=566) Mar 09 10:11:36.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:37.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:37.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:37.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:37.592 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:11:37.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:38.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:38.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:38.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:38.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:39.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:39.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:39.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:39.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:40.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:40.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:40.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:40.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:41.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:41.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:41.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:41.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:42.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:42.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:42.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:42.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:43.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:43.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:43.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:43.733 CPU0: JIT: flushing data structures (compiled pages=565) Mar 09 10:11:43.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:44.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:44.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:44.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:44.575 CPU0: JIT: partial JIT flush (count=200) Mar 09 10:11:44.806 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:45.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:45.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:45.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:45.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:45.893 CPU0: JIT: flushing data structures (compiled pages=567) Mar 09 10:11:45.981 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:11:46.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:46.067 CPU0: JIT: flushing data structures (compiled pages=590) Mar 09 10:11:46.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:46.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:46.599 CPU0: JIT: partial JIT flush (count=199) Mar 09 10:11:46.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:47.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:47.284 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:47.507 CPU0: JIT: flushing data structures (compiled pages=591) Mar 09 10:11:47.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:47.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:48.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:48.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:48.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:48.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:49.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:49.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:49.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:49.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:50.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:50.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:50.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:50.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:51.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:51.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:51.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:51.667 CPU0: JIT: partial JIT flush (count=180) Mar 09 10:11:51.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:52.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:52.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:52.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:52.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:53.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:53.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:53.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:53.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:54.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:54.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:54.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:54.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:55.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:55.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:55.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:55.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:56.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:56.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:56.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:56.637 CPU0: JIT: flushing data structures (compiled pages=590) Mar 09 10:11:56.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:56.805 CPU0: JIT: partial JIT flush (count=201) Mar 09 10:11:57.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:57.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:57.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:57.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:58.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:58.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:58.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:58.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:59.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:59.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:59.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:11:59.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:00.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:00.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:00.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:00.660 CPU0: JIT: flushing data structures (compiled pages=587) Mar 09 10:12:00.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:01.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:01.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:01.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:01.606 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:12:01.744 CPU0: JIT: flushing data structures (compiled pages=584) Mar 09 10:12:01.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:02.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:02.272 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:12:02.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:02.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:02.580 CPU0: JIT: flushing data structures (compiled pages=582) Mar 09 10:12:02.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:03.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:03.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:03.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:03.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:04.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:04.262 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:12:04.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:04.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:04.690 CPU0: JIT: flushing data structures (compiled pages=586) Mar 09 10:12:04.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:05.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:05.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:05.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:05.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:06.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:06.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:06.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:06.610 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:12:06.775 CPU0: JIT: flushing data structures (compiled pages=580) Mar 09 10:12:06.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:07.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:07.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:07.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:07.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:08.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:08.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:08.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:08.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:08.989 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:12:09.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:09.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:09.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:09.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:10.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:10.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:10.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:10.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:11.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:11.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:11.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:11.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:12.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:12.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:12.331 CPU0: JIT: flushing data structures (compiled pages=587) Mar 09 10:12:12.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:12.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:13.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:13.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:13.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:13.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:14.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:14.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:14.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:14.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:15.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:15.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:15.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:15.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:16.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:16.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:16.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:16.592 CPU0: JIT: partial JIT flush (count=182) Mar 09 10:12:16.655 CPU0: JIT: flushing data structures (compiled pages=591) Mar 09 10:12:16.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:16.802 CPU0: JIT: partial JIT flush (count=210) Mar 09 10:12:17.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:17.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:17.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:17.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:18.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:18.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:18.305 CPU0: JIT: flushing data structures (compiled pages=596) Mar 09 10:12:18.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:18.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:19.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:19.261 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:12:19.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:19.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:19.788 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:20.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:20.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:20.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:20.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:21.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:21.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:21.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:21.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:21.803 CPU0: JIT: flushing data structures (compiled pages=596) Mar 09 10:12:22.050 CPU0: JIT: partial JIT flush (count=205) Mar 09 10:12:22.068 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:22.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:22.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:22.683 CPU0: JIT: flushing data structures (compiled pages=598) Mar 09 10:12:22.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:23.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:23.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:23.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:23.595 CPU0: JIT: partial JIT flush (count=197) Mar 09 10:12:23.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:24.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:24.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:24.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:24.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:25.046 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:25.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:25.474 CPU0: JIT: flushing data structures (compiled pages=601) Mar 09 10:12:25.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:25.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:26.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:26.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:26.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:26.655 CPU0: JIT: partial JIT flush (count=193) Mar 09 10:12:26.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:27.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:27.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:27.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:27.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:28.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:28.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:28.451 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:12:28.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:28.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:29.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:29.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:29.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:29.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:30.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:30.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:30.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:30.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:31.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:31.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:31.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:31.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:32.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:32.128 CPU0: JIT: partial JIT flush (count=188) Mar 09 10:12:32.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:32.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:32.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:33.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:33.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:33.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:33.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:34.054 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:34.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:34.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:34.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:35.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:35.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:35.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:35.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:36.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:36.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:36.530 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:36.605 CPU0: JIT: flushing data structures (compiled pages=601) Mar 09 10:12:36.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:37.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:37.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:37.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:37.579 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:12:37.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:38.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:38.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:38.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:38.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:39.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:39.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:39.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:39.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:40.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:40.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:40.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:40.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:41.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:41.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:41.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:41.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:42.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:42.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:42.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:42.750 CPU0: JIT: flushing data structures (compiled pages=602) Mar 09 10:12:42.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:43.051 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:43.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:43.550 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:43.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:44.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:44.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:44.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:44.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:45.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:45.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:45.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:45.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:45.839 ROM: trying to set bootvar 'RANDOM_NUM=319679800' Mar 09 10:12:46.036 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:46.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:46.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:46.572 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:12:46.648 CPU0: JIT: flushing data structures (compiled pages=607) Mar 09 10:12:46.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:47.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:47.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:47.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:47.593 CPU0: JIT: partial JIT flush (count=198) Mar 09 10:12:47.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:48.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:48.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:48.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:48.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:49.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:49.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:49.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:49.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:50.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:50.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:50.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:50.791 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:51.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:51.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:51.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:51.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:52.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:52.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:52.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:52.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:53.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:53.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:53.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:53.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:54.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:54.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:54.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:54.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:55.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:55.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:55.551 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:55.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:56.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:56.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:56.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:56.587 CPU0: JIT: flushing data structures (compiled pages=608) Mar 09 10:12:56.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:56.817 CPU0: JIT: partial JIT flush (count=206) Mar 09 10:12:57.045 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:57.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:57.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:57.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:58.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:58.291 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:58.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:58.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:59.038 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:59.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:59.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:12:59.588 CPU0: JIT: flushing data structures (compiled pages=607) Mar 09 10:12:59.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:00.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:00.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:00.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:00.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:01.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:01.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:01.534 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:01.725 CPU0: JIT: partial JIT flush (count=185) Mar 09 10:13:01.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:02.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:02.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:02.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:02.577 CPU0: JIT: flushing data structures (compiled pages=609) Mar 09 10:13:02.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:03.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:03.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:03.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:03.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:04.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:04.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:04.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:04.797 CPU0: JIT: partial JIT flush (count=192) Mar 09 10:13:04.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:05.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:05.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:05.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:05.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:06.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:06.304 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:06.527 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:06.628 CPU0: JIT: flushing data structures (compiled pages=610) Mar 09 10:13:06.802 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:07.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:07.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:07.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:07.598 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:13:07.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:08.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:08.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:08.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:08.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:09.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:09.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:09.552 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:09.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:10.057 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:10.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:10.533 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:10.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:11.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:11.294 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:11.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:11.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:12.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:12.129 CPU0: JIT: flushing data structures (compiled pages=610) Mar 09 10:13:12.300 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:12.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:12.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:13.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:13.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:13.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:13.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:14.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:14.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:14.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:14.786 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:15.040 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:15.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:15.543 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:15.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:16.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:16.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:16.548 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:16.616 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:13:16.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:17.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:17.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:17.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:17.574 CPU0: JIT: flushing data structures (compiled pages=612) Mar 09 10:13:17.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:18.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:18.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:18.545 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:18.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:18.989 CPU0: JIT: partial JIT flush (count=194) Mar 09 10:13:19.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:19.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:19.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:19.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:20.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:20.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:20.555 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:20.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:21.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:21.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:21.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:21.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:22.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:22.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:22.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:22.787 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:23.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:23.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:23.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:23.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:24.043 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:24.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:24.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:24.796 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:25.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:25.297 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:25.546 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:25.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:26.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:26.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:26.557 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:26.610 CPU0: JIT: flushing data structures (compiled pages=610) Mar 09 10:13:26.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:27.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:27.303 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:27.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:27.592 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:13:27.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:28.059 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:28.285 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:28.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:28.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:29.028 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:29.280 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:29.532 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:29.783 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:30.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:30.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:30.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:30.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:31.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:31.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:31.558 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:31.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:32.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:32.140 CPU0: JIT: flushing data structures (compiled pages=610) Mar 09 10:13:32.278 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:32.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:32.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:33.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:33.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:33.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:33.789 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:34.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:34.290 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:34.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:34.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:35.042 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:35.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:35.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:35.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:36.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:36.194 CPU0: JIT: partial JIT flush (count=187) Mar 09 10:13:36.302 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:36.528 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:36.613 CPU0: JIT: flushing data structures (compiled pages=616) Mar 09 10:13:36.803 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:37.049 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:37.277 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:37.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:37.574 CPU0: JIT: partial JIT flush (count=196) Mar 09 10:13:37.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:38.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:38.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:38.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:38.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:39.055 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:39.276 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:39.496 CPU0: JIT: flushing data structures (compiled pages=612) Mar 09 10:13:39.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:39.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:40.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:40.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:40.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:40.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:41.033 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:41.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:41.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:41.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:42.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:42.139 CPU0: JIT: partial JIT flush (count=190) Mar 09 10:13:42.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:42.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:42.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:43.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:43.292 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:43.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:43.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:44.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:44.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:44.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:44.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:45.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:45.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:45.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:45.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:46.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:46.293 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:46.547 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:46.583 CPU0: JIT: flushing data structures (compiled pages=612) Mar 09 10:13:46.661 CPU0: JIT: partial JIT flush (count=208) Mar 09 10:13:46.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:47.029 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:47.283 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:47.537 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:47.611 CPU0: JIT: flushing data structures (compiled pages=621) Mar 09 10:13:47.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:48.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:48.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:48.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:48.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:49.056 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:49.279 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:49.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:49.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:50.034 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:50.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:50.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:50.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:51.050 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:51.301 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:51.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:51.776 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:52.030 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:52.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:52.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:52.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:53.032 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:53.286 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:53.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:53.799 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:54.048 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:54.299 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:54.557 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:54.780 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:55.037 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:55.287 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:55.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:55.792 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:56.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:56.289 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:56.540 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:56.589 CPU0: JIT: partial JIT flush (count=179) Mar 09 10:13:56.804 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:57.041 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:57.296 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:57.549 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:57.583 CPU0: JIT: flushing data structures (compiled pages=617) Mar 09 10:13:57.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:58.054 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:58.281 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:58.541 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x60819f48 (size=1) Mar 09 10:13:58.565 C3745_STOP: stopping simulation. Mar 09 10:13:58.565 CPU0: CPU_STATE: Halting CPU (old state=0)... Mar 09 10:13:58.679 VM: shutdown procedure engaged. Mar 09 10:13:58.680 VM_OBJECT: Shutdown of object "slot1" Mar 09 10:13:58.680 DEVICE: Removal of device slot1, fd=-1, host_addr=0x0, flags=2 Mar 09 10:13:58.680 VM_OBJECT: Shutdown of object "slot0" Mar 09 10:13:58.680 DEVICE: Removal of device slot0, fd=-1, host_addr=0x0, flags=2 Mar 09 10:13:58.680 VM_OBJECT: Shutdown of object "ns16552" Mar 09 10:13:58.680 DEVICE: Removal of device ns16552, fd=-1, host_addr=0x0, flags=0 Mar 09 10:13:58.680 VM_OBJECT: Shutdown of object "mem_bswap" Mar 09 10:13:58.680 DEVICE: Removal of device mem_bswap, fd=-1, host_addr=0x0, flags=0 Mar 09 10:13:58.680 VM_OBJECT: Shutdown of object "rom" Mar 09 10:13:58.680 DEVICE: Removal of device rom, fd=15, host_addr=0xed6c0000, flags=1 Mar 09 10:13:58.681 MMAP: unmapping of device 'rom', fd=15, host_addr=0xed6c0000, len=0x200000 Mar 09 10:13:58.681 VM_OBJECT: Shutdown of object "ram" Mar 09 10:13:58.681 DEVICE: Removal of device ram, fd=14, host_addr=0xed8d0000, flags=34 Mar 09 10:13:58.681 MMAP: unmapping of device 'ram', fd=14, host_addr=0xed8d0000, len=0x10000000 Mar 09 10:13:58.702 VM_OBJECT: Shutdown of object "gt96100" Mar 09 10:13:58.702 DEVICE: Removal of device gt96100, fd=-1, host_addr=0x0, flags=0 Mar 09 10:13:58.702 VM_OBJECT: Shutdown of object "io_fpga" Mar 09 10:13:58.702 DEVICE: Removal of device io_fpga, fd=-1, host_addr=0x0, flags=0 Mar 09 10:13:58.702 VM_OBJECT: Shutdown of object "ssa" Mar 09 10:13:58.702 DEVICE: Removal of device ssa, fd=13, host_addr=0xfeb70000, flags=2 Mar 09 10:13:58.702 MMAP: unmapping of device 'ssa', fd=13, host_addr=0xfeb70000, len=0x7000 Mar 09 10:13:58.702 VM_OBJECT: Shutdown of object "remote_ctrl" Mar 09 10:13:58.702 DEVICE: Removal of device remote_ctrl, fd=-1, host_addr=0x0, flags=0 Mar 09 10:13:58.703 VM: removing PCI busses. Mar 09 10:13:58.703 VM: deleting VTTY. Mar 09 10:13:58.703 VTTY: Console port: closing FD 12 Mar 09 10:13:58.703 VM: deleting system CPUs. Mar 09 10:13:58.703 CPU0: CPU_STATE: Halting CPU (old state=1)... Mar 09 10:13:58.708 VM: shutdown procedure completed. Mar 09 10:13:59.239 VM: trying to shutdown an inactive VM.